1. Field of the Invention
This invention relates generally to processors with an analog-to-digital conversion interface and a buffer to drive the input. More particularly, this invention relates to differential input buffers, such as used in programmable gain amplifiers of Asymmetric Digital Subscriber Line (ADSL) receivers.
2. Related Art
The Asymmetric Digital Subscriber Line (ADSL) is one of the new technologies used for high-speed Internet access. Data rates up to 9 Mb/s are currently available in the standard ADSL offering. An ADSL transmission system is specified in a frequency-division multiplexed scheme, with the downstream (i.e., central office to customer) utilizing a frequency range of approximately 160 kHz to 1.104 MHz and upstream (i.e., customer to central office) utilizing a frequency range of approximately 30 kHz to 138 kHz. In each frequency domain, the frequencies are divided into data bins with 4 kHz frequency spacing. For a discrete multi-tone system such as an ADSL system, the data rate is directly proportional to the signal-to-noise-distortion ratio (SNDR) available at the receive bins. The data rate increases with an increase in SNDR. High SNDR is achieved with large signal and low harmonic distortion and low noise.
A single ADSL chip integrates many digital circuits with sensitive front-end analog circuitry. An ADSL receiver front-end consists of a programmable gain amplifier and a unit-gain input buffer for backend analog-to-digital conversion (ADC). Because the system is typically manufactured in a digital process, the supply voltage is scaled with the shrinking transistor geometry. For example, a 0.251 μm process uses a supply voltage of 2.5 volts while a 0.13 μm process can tolerate a supply voltage of only 1.2 volts. When a supply voltage is reduced, the signal swing that the unit-gain input buffer can handle is limited due to reduced headroom. This limitation causes a reduction in SNDR.
It is therefore crucial to maximize the range of the signal swing that the receiver front-end circuit can process while maintaining low distortion performance (i.e., high linearity). Typically this is done with amplifiers that have one or more squeezable tail current sources. Linearity is important because harmonic distortion results in spillover from data bin to data bin that may corrupt the data spectrum. An ADSL system requires a high linearity performance in the neighborhood of 100 dB. To accomplish this, the squeezable tail current source must also be extremely linear, which requires a slightly different squeezable tail current source design.
What is needed is a fully differential input buffer with a wide signal swing range that allows for high linearity performance independent of the input voltage.